Cadence Design Systems (CDNS) shares climbed 5.2% to $330.66 on Friday, recouping most of the prior session's 5.21% decline. The bounce came as investors refocused on the company's expanded collaboration with Taiwan Semiconductor Manufacturing Co. (TSM) in the fast-growing AI chip design space.
The electronic design automation (EDA) specialist announced it is deepening its partnership with TSMC, rolling out a comprehensive suite of intellectual property (IP), certified design flows, and signoff-ready infrastructure tailored for AI semiconductors built on TSMC's advanced process nodes, including N3, N2, A16, and A14. This signoff-ready approach, which provides final validation before manufacturing, is seen as critical for complex AI chip designs. "AI silicon innovation at advanced nodes demands a signoff-ready approach," said Chin-Chi Teng, senior vice president and general manager at Cadence. Aveek Sarkar of TSMC emphasized that AI workloads and tighter design schedules are driving demand for advanced, energy-efficient silicon technologies and thoroughly validated IP.
Cadence's EDA tools are essential for designing, simulating, and verifying chips before they go into production, making the company a key beneficiary of the AI chip boom. The surge in AI processor demand has heightened the role of these tools as chipmakers pack more compute into increasingly complex designs that are tougher to test and cool.
Investors are now turning their attention to Cadence's first-quarter 2026 earnings report, due after the market close on Monday, April 27. CEO Anirudh Devgan and CFO John Wall will host a webcast at 2 p.m. Pacific. Rosenblatt Securities reiterated a Buy rating on the stock with a $360 price target, looking for quarterly revenue of $1.453 billion, which is above the midpoint of Cadence's guidance range of $1.420 billion to $1.460 billion.
The TSMC announcement came alongside the foundry's latest technology roadmap. TSMC detailed its A13 process, a smaller version of A14, which is on track for production in 2029 and promises a 6% area reduction. The company also shared plans for its N2U process in 2028 and an expansion of its CoWoS advanced packaging technology aimed at AI systems.
Cadence is not alone in aligning its plans with TSMC's timeline. Synopsys and Siemens EDA have also released TSMC-focused updates tied to the same tech event, noted Brendan Burke, an analyst at Futurum Group. Burke wrote that EDA vendors who get certified, production-ready flows to market first are most likely to secure early design wins.
Cadence continues to push the idea that AI's role extends beyond end-market demand. Earlier this month, the company announced a partnership with Nvidia targeting AI in robotics, blending Cadence's physics engines with Nvidia's simulation models for robot training. "The more accurate the training data, the better the model will be," Devgan told Reuters.
In February, Cadence topped Wall Street expectations for both revenue and profit, driven by strong interest in its AI-focused chip design tools. The company reported a record $7.8 billion backlog and projected 2026 revenue in the range of $5.9 billion to $6.0 billion. However, the stock's valuation remains elevated, trading above 85 times earnings as of Friday. Investors may need to wait until at least 2028 or 2029 for significant revenue contributions from design wins at TSMC's latest nodes, as several key technologies are not scheduled for production until then.
For now, Cadence is viewed as a picks-and-shovels bet on AI chips rather than a chipmaker itself. All eyes will be on Monday's earnings report to see if bookings, margins, and guidance can justify that stance—or if this is just another crowded AI trade ahead of earnings.
